Imagine you have a programmable calculator sitting on your desk. Now imagine you could somehow fold that calculator into the pages of a novel, so that when someone reads the novel aloud — word by word, left to right — the calculator runs. No batteries, no chips. The act of reading IS the computation. That is, structurally, what Qwenputer does: it compiles a full RISC-V CPU into the weight matrices of a 4-billion-parameter language model, so that the model's own forward passes execute deterministic machine instructions. The committed claim: you can embed a complete, correct, 32-bit RISC-V core (RV32IM plus Zba and bignum extensions) into 11 extra transformer layers prepended to Qwen 3.5 4B, using the model's Gated DeltaNet attention heads as addressable RAM, and the resulting system passes the official riscv-tests suite, matches QEMU output, and runs 18 million instructions free-running without a single error. This is not tool use, not a plugin, not an external sandbox. The CPU lives in the weights. The mechanism that makes this possible is surprisingly clean. Gated DeltaNet heads maintain a state matrix updated via the delta rule. By setting the gate to 1 (no forgetting), write strength to 1 (full overwrite), and using one-hot key encoding, each write targets exactly one row and each query retrieves an exact value. This turns the RNN state into genuine random-access memory — constant size regardless of sequence length, unlike attention's KV cache. The insight that delta-rule linear attention acts as associative memory traces back to Schlag et al. (2021), but the novel move is making it exact and addressable enough to run a whole CPU. On benchmarks, the results are striking. On NUPA long-integer arithmetic, Qwenputer takes base Qwen from 48.6% to 100% — matching a Python tool. On DeepMind arithmetic sets, it scores 97.5-100% across division, multiplication, and mixed operations, matching or beating the external-Python-tool baseline. The author also verified 230,000 output positions against a reference machine with zero mismatches, and showed that bolting the CPU on doesn't disturb Qwen's language capabilities (KL divergence 6e-4 against a noise floor of 5e-4). There's even an experimental filesystem: 512 files, ~53K tokens of persistent storage in the DeltaNet state, with 90% accuracy on cross-conversation fact retrieval versus 30% for pasting old chats. The integrity picture is unusual for this kind of work — stronger than most blog-published research. The CPU passes the official RISC-V test suite (a community standard), matches QEMU (independent reference), and the code and model weights are publicly available on GitHub, Hugging Face, and ModelScope. The main caveats are honest: the checkpoint is 18.8 GB (roughly double base Qwen, mostly zero padding), it needs a small driver (RvChat) to boot firmware, and it's slow — each CPU instruction costs several decoded tokens, with throughput around 3,200 CPU tokens per second on an L4. No independent replication yet, but the materials for it exist. The safety implications may matter more than the arithmetic. The author explicitly flags two follow-ups: hybrid models can learn to hide reasoning in their RNN state to evade chain-of-thought monitoring, and compiled weights can serve as tamper-proof in-model monitors. The first is a concrete demonstration that linear-RNN hybrid architectures create an opaque reasoning channel that current CoT oversight cannot see. The second suggests compiled-weight techniques could become monitoring infrastructure. Both deserve separate analysis. What's next is clear: the author wants Qwen to write Python and execute it on the in-weight MicroPython interpreter via a python() tool, and wants to make the CPU faster. The obvious experiment not run is scaling this to a larger base model to see if the technique generalizes beyond Qwen 3.5's specific GDN architecture, and whether the zero-error property holds at longer instruction counts or with noisier quantized weights.
